Very Large Scale Integration Lab

The prime objective of this laboratory to give a compact idea about recent trends in digital system design, ASIC design and FPGA based hardware design and implementations. Now a day, the high-speed communication channels requires peripheral devices with higher data processing capability with minimum latency. FPGA based system is an attractive choice for this purpose. Again, semi-custom/programmable design style in FPGA based design reduces the design time, complexity and cost. The hardware description language (HDL) such as Verilog is widely used for FPGA development due to its simplicity and design portability and cross-platform in nature. Apart from that, this lab gives a fair idea about CAD tool used for analog design which basically starts from transistors