Amit Bakshi

Assistant Professor

Amit Bakshi received the B.Tech.degree in Electronics and Communication Engineering from Asansol Engineering College,WB and M.Tech. degree in VLSI Design from VIT University, Vellore. He is currently working as an Assistant Professor since 2014 in the School of Electronics Engineering, Kalinga Institute of Industrial Technology Deemed to be University, Bhubaneswar, where he is currently pursuing the Ph.D. degree. His research interests are in Low power Digital Integrated Circuit design, FPGA base system design, ASIC design, Biomedical imaging, Digital signal processing and its application. He has an expertise in various technology tools like Virtuoso (Cadence) Design Suite, NC-Verilog Simulator, Ncsim, RTL Compiler, ALTERA, ModelSim, Xilinx, Vivado, MATLAB etc.

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Email :
[email protected]
Scopus Id :
55752058700
Google Scholar :
https://scholar.google.co.in/citations?user=8kQVoLEAAAAJ&hl=en

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Educational Qualification
Mtech, P.h.D(Continue)

Research Interests
VLSI Design

Memberships
Life time member ISC
Journals/Conferences :
1.Ruchi Yadav, Amit Bakshi, Joy Chowdhury, JK Das. "Adiabatic approach for charge restoration in low power digital circuits", IEEE International Conference on Inventive Systems and Control (ICISC), June 2018
2. Tuhinansu Pradhan, Amit Bakshi. " Design of a low-voltage low power dynamic latch comparator for a 1.2-V 0.4-mW CT delta sigma modulator with 41-dBm SNDR", IEEE International Conference on Trends in Electronics and Informatics (ICEI), April-2017.
3. Bhavesh Sharma, Amit Bakshi." Comparison of 24X24 Bit Multipliers for Various Performance Parameters",International Journal of Research in Advent Technology, March 2015.
4. Aritra Mitra, Amit Bakshi, Bhavesh Sharma, Nilesh Didwania, "Design of a High Speed Adder", International Journal of Scientific & Engineering Research, Volume 6, Issue 4, April-2015 .
5. Bhavesh Sharma , Amit Bakshi. " Design And Implementation Of An Efficient Single Precision Floating Multiplier Using Vedic Multiplication", International Journal of Scientific & Engineering Research, Volume 6, Issue 4, April-2015.
6. Sudhanshu Shekhar Pandey Amit Bakshi, " 128 Bit Low Power and Area Efficient Carry Select Adder", International Journal of Computer Applications (IJCA), Vol.69-No.6, May 2013, page.29-33
7. Tribikram Pradhan, Pramod Kumar, NS Anil, Amit Bakshi. "Design of Framework for Logic Synthesis Engine", International Journal of Engineering and Technology (IJET), Vol.5, Apr. 2013, page.1710-1715
8. Amit Bakshi, Sudhanshu Shekhar Pandey, Tribikram Pradhan, Ratnadip Dey. "ASIC Implementation of DDR SDRAM Memory Controller", IEEE International
Conference in Engineering and Recent Trends in Computing, Communication and Nanotechnology ISBN: 978-1- 4673-5036-5, pp. 74-78, 2013
9.Amit Bakshi, "Implimentation of power gating technique in CMOS full adder cell to reduce leakage power and ground bounce noise for mobile application", International Journal of Electronics, Communication & Instrumentation Engineering Research and Development (IJECIERD), Vol.2, Issue 3 Sept. 2012 page.97-108