Jitendra Kumar Das
Jitendra Kumar Das
Associate Professor
Acquired B.E.(Electronics & Telecommunication Engineering) in 1992 from Utkal University. Received M. Tech(Electronics System and Communication) in 2004 and Ph. D. (ECE) in 2011 from NIT Rourkela. More than 10 years of teaching experience in various subjects Electronics & Communication like AEC, Digital System Design, VLSI Design, Embedded System Design, Digital Signal Processing. His research interest is VLSI Signal processing, Digital System design, Device Modeling and Embedded System Design.
Educational Qualification
PhD
Research Interests
VLSI Circuits & System, Embedded System Design, Semiconductor Device Modeling, Signal Processing
PhD
Research Interests
VLSI Circuits & System, Embedded System Design, Semiconductor Device Modeling, Signal Processing
Journals/Conferences :
Sudarsan Sahoo and Jitendra Kumar Das, Application of Adaptive Wavelet Transform for Gear Fault Diagnosis Using Modified-LLMS Based Filtered Vibration Signal, , Recent Advances in Electrical & Electronic Engineering, Bentham Science Publishers, pp. 257-262(6), Volume 12, Number 3, June 2019
Lopamudra Das, Sarita Nanda, J. K. Das, " Modified Gabor Wavelet Transform Analysis in Prediction of Cancerous Genes", International Journal of Engineering & Advanced Technology (IJEAT) , pp. 902-907, Volume-9, Issue-1, October 2019
Kumar Neeraj, J. K. Das, Hari Shanker Srivastava, "Design of Self Controllable Voltage Level Circuit (SVL) for Low Power and High Speed 12t Sram at 15nm Technology", International Journal of Engineering & Advanced Technology (IJEAT), pp. 1561-1565, Volume-9 Issue-2, December, 2019.
B. Vandana, B. S. Patro, J. K. Das, and S. K. Mohapatra, “ Impact of Channel Engineering (Si1-0.25Ge0.25) Technique on gm(Transconductance) and its Higher Order Derivatives of 3D Conventional and Wavy Junctionless FinFETs(JLT)”, Facta Universitatis, Series: Electronics and Energetics, Vol 31, No 2, pp. 257-265, 2018
B. Vandana, B. S. Patro, J. K. Das, Brajesh Kumar Kaushik and S. K. Mohapatra, “Inverted ‘T’ Junctionless FinFET (ITJL FinFET): Performance Estimation through Device Geometry Variations”, ECS Journal of Solid State Science and Technology, Vol. 7, issue-4, pp. Q52-Q59, 2018
Sudarsan Sahoo and J.K. Das, “ Fault Diagnosis in Rolling Element Bearing Using Filtered Vibration and Acoustic Signal”, International journal of Pure and Applied Mathematics, Volume 118 (8), pp. 95-102, 2018
Sudarsan Sahoo and Jitendra Kumar Das, “Bearing Health Monitoring and Diagnosis Using ANC Based Filtered Vibration Signal” Journal of Engineering and Applied Sciences, Vol. 13, pp. 3587-3593, 2018.
Lopamudra Das , Sarita Nanda, J.K. Das, “An integrated approach for identification of exon locations using recursive Gauss Newton tuned adaptive Kaiser window”, Genomics, Elsevier Vol. No. 111(3), pp. 282-294.
Sudarsan Sahoo and J.K. Das, Rolling Element Bearing Condition Monitoring Using Filtered Acoustic Emission, International Journal of Electrical and Computer Engineering, vol. 8, No. 5, October 2018, pp. 3560~3567.
Shubham Singh, Sayani Pal, Joy Chowdhury, J. K. Das, Deeksha Agarwal, Dewashish Surjan, Kiran Nayak, “Umbilical Cord Acid-Base Analysis: A Fuzzy Diagnosis Technique”, International Journal of Pure and Applied Mathematics, Vol. 118, No. 18, pp. 3397-3405, 2018.
Sudarsan Sahoo and Jitendra Kumar Das, Bearing Fault Detection and Classification using ANC Based Filtered Vibration Signal, Lecture Notes in Electrical Engineering, Springer, volume 500, 2018, pp. 325-334.
B. Vandana, J. K. Das, B. S. Patro, and S. K. Mohapatra, “Prospects of 2D Junctionless Channel Transistor (JLCT)Towards Analog and RF Metrics Using Si and SiGe in Device Layer”, Journal of Low Power Electronics, Vol. 13, 1–9, 2017
B. Vandana, B. S. Patro, J. K. Das, and S. K. Mohapatra, “ Physical insight of junctionless transistor with simulation study of Strained channel”, ECTI Trans. Electr. Eng. Electron. Communication, vol. 15, no. 1, pp. 1–7, 2017
B. Vandana, B. S. Patro, J. K. Das, and S. K. Mohapatra, “ Exploration towards Electrostatic Integrity For SiGe On Insulator (SG-OI) On Junctionless Channel Transistor (JLCT)”, Facta Universitatis, Series: Electronics and Energetics, vol. 30(3), pp. 383-390, 2017
TM Behera, B Vandana, JK Das, SK Mohapatra, “Perception on Nano Computing and its Application”, Journal of CSI Communications”, Volume-41, Issue- 02,pp.10-12, 2017.
Sudarsan Sahoo and J. K. Das, Investigation of the Effect of Video Game Play on Cognitive Behavior using Adaptive Noise Cancellation and Wavelet Transform, Indian Journal of Science and Technology, Vol 10(27), July 2017.
Suman Biswas, Dr. J. K. Das, "Ultra Low Power High Speed Comparator for Analog to Digital Conversion" with M. Tech student in IJERT, Vol. 3 Issue - 11, Nov., 2014
Joy Chowdhury, J. K. Das, N. K. Rout, " Implementation of low power integrator & Differentiator using Memristor", IJAER, ISSN- 0973-4562, Vol-10, No. 9, PP- 9009-9012.
Joy Chowdhury, J. K. Das, N. K. Rout, “ Implementation of 24T Memristor Based Adder Architecture with improved performance”, IJEEDC, Volume-3, Issue-6pp- 91-94, 2015
Joy Chowdhury, J. K. Das, N. K. Rout, “Implementation of low power integrator & Differentiator using Memristor” IJAER, Vol-10, No. 9, PP- 9009-9012, 2015
Sarojini Mondal, Dr. J. K. Das, "Design of 3-Bit Low Power Flash Type ADC", International Journal of Advanced Research in Computer Engineering & Technology, Vol.3, Issue-4,, pp:1116-1121, April-2014.
Sarojini Mondal, Dr. J. K. Das, “Family of a novel 3 bit Flash ADC”, International Journal of Advanced Research in Computer and Communication Engineering, Vol. 3, Issue 4, pp. 6325-6328, 2014.
Conference Publication
Vandana, J. K. Das, M. S. Jyothi, and S. K. Mohapatra, “ Molefraction Dependency Electrical Performance of Extremely Thin SiGe on Insulator Junctionless Channel transistor (SG-OI JLCT)”, International Conference on Signal Processing and Communication, 2018.
Lopamudra Das, J. K. Das, Sarita Nanda, “A novel DNA mapping scheme for improved exon prediction using digital filters”, 2nd International Conference on Man and Machine Interfacing (MAMI), 2017.
Lopamudra Das, J. K. Das; Sarita Nanda, Advanced protein coding region prediction applying robust SVD algorithm, 2nd International Conference on Man and Machine Interfacing (MAMI), 2017
3. Lopamudra Das, J. K. Das, Sarita Nanda, “Identification of exon location applying Kaiser Window and DFT Techniques, 2nd International Conference for Convergence in Technology (I2CT), 2017.
Vandana, J. K. Das, and S. K. Mohapatra, “Effectiveness of High Permittivity Spacer for Underlap regions of Wavy-Junctionless FinFET at 22 nm node and Scaling Short Channel Effects”, 21st International Symposium in VLSI Design and Test (VDAT), pp 545-556 ,2017 a part of Communications in Computer and Information Science book series (CCIS, volume 711), Springer.
Vandana, J. K. Das, M. S. Jyothi, and S. K. Mohapatra, “Impact on Gate Oxide material of Inverted ‘T’ Junction less FinFET at 22 nm Technology node”, 1st International Conference on Electronics, Materials Engineering and Nano-Technology, 2017
B. Vandana, B. S. Patro, J. K. Das, and S. K. Mohapatra, “SiGe on Insulator (SG-OI) on Junctionless Channel Transistor: A new device for scaling with improved switching action”, 2nd International Conference on Microelectronics, Communication and Computation, pp. 215-221, 2016
Su
man Biswas, Dr. J. K. Das, " Design & Implementation Of 4-Bit Flash ADC Using Low Power Low Offset Dynamic Comparator", IEEE International Conference on Electrical, Electronics, Signals, Communication & Optimization (EESCO-2015), pp. 1-6, DOI: 10.1109/EESCO.2015.7253935
Adyasha Das, S. K. Mondal, Dr. J. K. Das, " High Speed Square Select Carry Select Adder using MTCMOS D-Latch in 45nm Technology", IEEE International Conference on Electrical, Electronics, Signals, Communication & Optimization (EESCO-2015), Pages: 1 - 4, DOI: 10.1109/EESCO.2015.7253977, 2015
K. Parvathi, Bijet Maynoher Samal, J. K. Das, "Odia Braille: Text transcription via Image Processing", IEEE International Conference on Futuristic Trends in Computational Analysis & Knowledge Management pp. 138-143, IEEE CPS, DOI: 10.1109/ABLAZE.2015.7154983, 2015.
Joy Chowdhury, J. K. Das, N. K. Rout, "Implementation of 24T Memristor Based Adder Architecture with Improved performance", International Journal of Electrical, Electronics and Data Communication, ISSN: 2320-2084 Volume-3, Issue-6, June-2015, pp- 91-94
Joy Chowdhury, J. K. Das, Trignometric Window Function for Memristive Device Modeling”, 2015 5th International Conference on Advanced Com[puting & Communication Technologies, PP-157-161, IEEE CPS, DOI- 10.1109/ACCT.2015.25, 2015.
Implementing Trigonometric Nonlinearity in Linear Ion-drift Memristor Model, IEEE International Conference on Industrial Instrumentation and Control, College of Engineering Pune, pp- 1150-1153, DOI- 10.11.09/IIC.2015.7150921.
Sudarsan Sahoo and Jitendra Kumar Das, Application of Adaptive Wavelet Transform for Gear Fault Diagnosis Using Modified-LLMS Based Filtered Vibration Signal, , Recent Advances in Electrical & Electronic Engineering, Bentham Science Publishers, pp. 257-262(6), Volume 12, Number 3, June 2019
Lopamudra Das, Sarita Nanda, J. K. Das, " Modified Gabor Wavelet Transform Analysis in Prediction of Cancerous Genes", International Journal of Engineering & Advanced Technology (IJEAT) , pp. 902-907, Volume-9, Issue-1, October 2019
Kumar Neeraj, J. K. Das, Hari Shanker Srivastava, "Design of Self Controllable Voltage Level Circuit (SVL) for Low Power and High Speed 12t Sram at 15nm Technology", International Journal of Engineering & Advanced Technology (IJEAT), pp. 1561-1565, Volume-9 Issue-2, December, 2019.
B. Vandana, B. S. Patro, J. K. Das, and S. K. Mohapatra, “ Impact of Channel Engineering (Si1-0.25Ge0.25) Technique on gm(Transconductance) and its Higher Order Derivatives of 3D Conventional and Wavy Junctionless FinFETs(JLT)”, Facta Universitatis, Series: Electronics and Energetics, Vol 31, No 2, pp. 257-265, 2018
B. Vandana, B. S. Patro, J. K. Das, Brajesh Kumar Kaushik and S. K. Mohapatra, “Inverted ‘T’ Junctionless FinFET (ITJL FinFET): Performance Estimation through Device Geometry Variations”, ECS Journal of Solid State Science and Technology, Vol. 7, issue-4, pp. Q52-Q59, 2018
Sudarsan Sahoo and J.K. Das, “ Fault Diagnosis in Rolling Element Bearing Using Filtered Vibration and Acoustic Signal”, International journal of Pure and Applied Mathematics, Volume 118 (8), pp. 95-102, 2018
Sudarsan Sahoo and Jitendra Kumar Das, “Bearing Health Monitoring and Diagnosis Using ANC Based Filtered Vibration Signal” Journal of Engineering and Applied Sciences, Vol. 13, pp. 3587-3593, 2018.
Lopamudra Das , Sarita Nanda, J.K. Das, “An integrated approach for identification of exon locations using recursive Gauss Newton tuned adaptive Kaiser window”, Genomics, Elsevier Vol. No. 111(3), pp. 282-294.
Sudarsan Sahoo and J.K. Das, Rolling Element Bearing Condition Monitoring Using Filtered Acoustic Emission, International Journal of Electrical and Computer Engineering, vol. 8, No. 5, October 2018, pp. 3560~3567.
Shubham Singh, Sayani Pal, Joy Chowdhury, J. K. Das, Deeksha Agarwal, Dewashish Surjan, Kiran Nayak, “Umbilical Cord Acid-Base Analysis: A Fuzzy Diagnosis Technique”, International Journal of Pure and Applied Mathematics, Vol. 118, No. 18, pp. 3397-3405, 2018.
Sudarsan Sahoo and Jitendra Kumar Das, Bearing Fault Detection and Classification using ANC Based Filtered Vibration Signal, Lecture Notes in Electrical Engineering, Springer, volume 500, 2018, pp. 325-334.
B. Vandana, J. K. Das, B. S. Patro, and S. K. Mohapatra, “Prospects of 2D Junctionless Channel Transistor (JLCT)Towards Analog and RF Metrics Using Si and SiGe in Device Layer”, Journal of Low Power Electronics, Vol. 13, 1–9, 2017
B. Vandana, B. S. Patro, J. K. Das, and S. K. Mohapatra, “ Physical insight of junctionless transistor with simulation study of Strained channel”, ECTI Trans. Electr. Eng. Electron. Communication, vol. 15, no. 1, pp. 1–7, 2017
B. Vandana, B. S. Patro, J. K. Das, and S. K. Mohapatra, “ Exploration towards Electrostatic Integrity For SiGe On Insulator (SG-OI) On Junctionless Channel Transistor (JLCT)”, Facta Universitatis, Series: Electronics and Energetics, vol. 30(3), pp. 383-390, 2017
TM Behera, B Vandana, JK Das, SK Mohapatra, “Perception on Nano Computing and its Application”, Journal of CSI Communications”, Volume-41, Issue- 02,pp.10-12, 2017.
Sudarsan Sahoo and J. K. Das, Investigation of the Effect of Video Game Play on Cognitive Behavior using Adaptive Noise Cancellation and Wavelet Transform, Indian Journal of Science and Technology, Vol 10(27), July 2017.
Suman Biswas, Dr. J. K. Das, "Ultra Low Power High Speed Comparator for Analog to Digital Conversion" with M. Tech student in IJERT, Vol. 3 Issue - 11, Nov., 2014
Joy Chowdhury, J. K. Das, N. K. Rout, " Implementation of low power integrator & Differentiator using Memristor", IJAER, ISSN- 0973-4562, Vol-10, No. 9, PP- 9009-9012.
Joy Chowdhury, J. K. Das, N. K. Rout, “ Implementation of 24T Memristor Based Adder Architecture with improved performance”, IJEEDC, Volume-3, Issue-6pp- 91-94, 2015
Joy Chowdhury, J. K. Das, N. K. Rout, “Implementation of low power integrator & Differentiator using Memristor” IJAER, Vol-10, No. 9, PP- 9009-9012, 2015
Sarojini Mondal, Dr. J. K. Das, "Design of 3-Bit Low Power Flash Type ADC", International Journal of Advanced Research in Computer Engineering & Technology, Vol.3, Issue-4,, pp:1116-1121, April-2014.
Sarojini Mondal, Dr. J. K. Das, “Family of a novel 3 bit Flash ADC”, International Journal of Advanced Research in Computer and Communication Engineering, Vol. 3, Issue 4, pp. 6325-6328, 2014.
Conference Publication
Vandana, J. K. Das, M. S. Jyothi, and S. K. Mohapatra, “ Molefraction Dependency Electrical Performance of Extremely Thin SiGe on Insulator Junctionless Channel transistor (SG-OI JLCT)”, International Conference on Signal Processing and Communication, 2018.
Lopamudra Das, J. K. Das, Sarita Nanda, “A novel DNA mapping scheme for improved exon prediction using digital filters”, 2nd International Conference on Man and Machine Interfacing (MAMI), 2017.
Lopamudra Das, J. K. Das; Sarita Nanda, Advanced protein coding region prediction applying robust SVD algorithm, 2nd International Conference on Man and Machine Interfacing (MAMI), 2017
3. Lopamudra Das, J. K. Das, Sarita Nanda, “Identification of exon location applying Kaiser Window and DFT Techniques, 2nd International Conference for Convergence in Technology (I2CT), 2017.
Vandana, J. K. Das, and S. K. Mohapatra, “Effectiveness of High Permittivity Spacer for Underlap regions of Wavy-Junctionless FinFET at 22 nm node and Scaling Short Channel Effects”, 21st International Symposium in VLSI Design and Test (VDAT), pp 545-556 ,2017 a part of Communications in Computer and Information Science book series (CCIS, volume 711), Springer.
Vandana, J. K. Das, M. S. Jyothi, and S. K. Mohapatra, “Impact on Gate Oxide material of Inverted ‘T’ Junction less FinFET at 22 nm Technology node”, 1st International Conference on Electronics, Materials Engineering and Nano-Technology, 2017
B. Vandana, B. S. Patro, J. K. Das, and S. K. Mohapatra, “SiGe on Insulator (SG-OI) on Junctionless Channel Transistor: A new device for scaling with improved switching action”, 2nd International Conference on Microelectronics, Communication and Computation, pp. 215-221, 2016
Su
man Biswas, Dr. J. K. Das, " Design & Implementation Of 4-Bit Flash ADC Using Low Power Low Offset Dynamic Comparator", IEEE International Conference on Electrical, Electronics, Signals, Communication & Optimization (EESCO-2015), pp. 1-6, DOI: 10.1109/EESCO.2015.7253935
Adyasha Das, S. K. Mondal, Dr. J. K. Das, " High Speed Square Select Carry Select Adder using MTCMOS D-Latch in 45nm Technology", IEEE International Conference on Electrical, Electronics, Signals, Communication & Optimization (EESCO-2015), Pages: 1 - 4, DOI: 10.1109/EESCO.2015.7253977, 2015
K. Parvathi, Bijet Maynoher Samal, J. K. Das, "Odia Braille: Text transcription via Image Processing", IEEE International Conference on Futuristic Trends in Computational Analysis & Knowledge Management pp. 138-143, IEEE CPS, DOI: 10.1109/ABLAZE.2015.7154983, 2015.
Joy Chowdhury, J. K. Das, N. K. Rout, "Implementation of 24T Memristor Based Adder Architecture with Improved performance", International Journal of Electrical, Electronics and Data Communication, ISSN: 2320-2084 Volume-3, Issue-6, June-2015, pp- 91-94
Joy Chowdhury, J. K. Das, Trignometric Window Function for Memristive Device Modeling”, 2015 5th International Conference on Advanced Com[puting & Communication Technologies, PP-157-161, IEEE CPS, DOI- 10.1109/ACCT.2015.25, 2015.
Implementing Trigonometric Nonlinearity in Linear Ion-drift Memristor Model, IEEE International Conference on Industrial Instrumentation and Control, College of Engineering Pune, pp- 1150-1153, DOI- 10.11.09/IIC.2015.7150921.